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301.

Adding custom RISC-V instructions to an open-source rv32 SoC

github.com/stnolting

4 years ago

54 points

302.

PicoRV32 – A Size-Optimized RISC-V CPU

github.com/cliffordwolf

11 years ago

53 points

303.

Geohot/twitchcore: A RISC-V core, first in Python, then in Verilog, then on FPGA

github.com/geohot

5 years ago

51 points

304.

Show HN: I built a RISC-V emulator that runs DOOM

github.com/lalitshankarch

2 months ago

50 points

305.

Some Criticisms of RISC-V

gist.github.com

7 years ago

DyslexicAtheist

41 points

306.

Show HN: Libriscv – RISC-V userspace emulator library

github.com/fwsGonzo

4 years ago

40 points

307.

NEORV32: A tiny, embedded and free-of-charge open-source RISC-V SoC

github.com/stnolting

4 years ago

40 points

308.

Conquest – An open source strategy game similar to Risk and written in Godot

github.com/argosopentech

4 years ago

34 points

309.

ArgoCD: Use of Risky or Missing Cryptographic Algorithms in Redis Cache

github.com/argoproj

2 years ago

33 points

310.

Show HN: C++17 RISC-V RV32GC / RV64GC userspace emulator library

github.com/fwsGonzo

6 years ago

31 points

311.

128-bit RISC-V assembler

github.com/fwsGonzo

5 years ago

30 points

312.

RISC-V Sandboxing Library

github.com/libriscv

a year ago

25 points

313.

Run Linux in VRChat by emulating RISC-V in a GPU shader program

github.com/PiMaker

5 years ago

18 points

314.

Felix86: Play x86-64 games on RISC-V

github.com/OFFTKP

a year ago

15 points

315.

Possible GPL Violation by Banana Pi RiscV

github.com/BPI-SINOVOIP

10 months ago

14 points

316.

How to run Ockam on RISC-V Linux

github.com/ockam-network

5 years ago

14 points

317.

Multiple 0Day Vulnerabilities in IBM Data Risk Manager

github.com/pedrib

6 years ago

14 points

318.

Salus: A micro hypervisor for RISC-V systems

github.com/rivosinc

3 years ago

13 points

319.

LuaJIT maintainers quietly deleted discussion about RISC-V 64 support

5 months ago

12 points

320.

etcd bug: Minority failure during cluster configuration change risks deadlock

github.com/coreos

11 years ago

11 points

321.

SERV: A bit-serial RISC-V core

github.com/olofk

3 years ago

9 points

322.

Ask HN: Porting MIT CADR to RISC-V

4 months ago

8 points

323.

Smol-GPU: A tiny RISC-V GPU built to teach modern GPU architecture

github.com/Grubre

a year ago

8 points

324.

How to get started with Rust for RISC-V targets

github.com/ockam-network

5 years ago

8 points

325.

Linux on RISC-V on Arduino Uno

github.com/raspiduino

3 years ago

7 points

326.

Kilo editor ported to Forth for RISC-V

github.com/mcmenaminadrian

2 years ago

7 points

327.

Apple is adding Mach-O's riscv32 support to LLVM

github.com/llvm

a year ago

7 points

328.

D Apps for Apache NuttX RTOS and QEMU RISC-V

github.com/kassane

2 years ago

7 points

329.

Systemd-journald: possible risks and limitations

3 years ago

7 points

330.

Muntjac: An open source, Linux capable, 64 bit RISCV core

github.com/lowRISC

4 years ago

7 points