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91.

Show HN: RISC-V core written in 600 lines of C89

github.com/mnurzia

3 years ago

190 points

92.

Linux running inside a PDF file via a RISC-V emulator

github.com/ading2210

a year ago

183 points

93.

Ariane RISC-V CPU

github.com/pulp-platform

8 years ago

171 points

94.

Show HN: Minimax – A Compressed-First, Microcoded RISC-V CPU

github.com/gsmecher

4 years ago

171 points

95.

Fast RISC-V-based scripting back end for game engines

github.com/fwsGonzo

2 years ago

159 points

96.

A Verilog to Factorio Compiler and Simulator (Working RISC-V CPU)

github.com/ben-j-c

3 months ago

154 points

97.

Western Digital SweRV RISC-V Core

github.com/chipsalliance

6 years ago

153 points

98.

Ripes: Visual computer architecture simulator, assembly code editor for RISC-V

github.com/mortbopet

3 years ago

151 points

99.

LuaJIT PR: Add Support for RISC-V 64

github.com/LuaJIT

2 years ago

146 points

100.

RVVM – The RISC-V Virtual Machine

github.com/LekKit

3 years ago

140 points

101.

RVVM – RISC-V Virtual Machine

github.com/lekkit

5 years ago

129 points

102.

A FPGA friendly 32 bit RISC-V CPU implementation

github.com/SpinalHDL

a year ago

121 points

103.

IceStick Tutorial: experience FPGA design and RISC-V using $40 FPGA device

github.com/BrunoLevy

6 years ago

119 points

104.

T1: A RISC-V Vector processor implementation

github.com/chipsalliance

a year ago

117 points

105.

Show HN: Anos – a hand-written ~100KiB microkernel for x86-64 and RISC-V

github.com/roscopeco

3 months ago

115 points

106.

Jupiter: RISC-V Assembler and Runtime Simulator

github.com/andrescv

7 years ago

112 points

107.

NanoKVM: Affordable, Multifunctional, Nano RISC-V IP-KVM

github.com/sipeed

2 years ago

111 points

108.

Show HN: IDE for Learning RISC-V

github.com/TheThirdOne

7 years ago

105 points

109.

An FPGA-friendly 32-bit RISC-V CPU implementation

github.com/SpinalHDL

9 years ago

102 points

110.

VeriGPU: GPU in Verilog loosely based on RISC-V ISA

github.com/hughperkins

4 years ago

101 points

111.

Open-source soft-core RISC-V SoC with gdb support

github.com/stnolting

5 years ago

94 points

112.

A minimal operating system (2K LOC) on QEMU and a RISC-V board

github.com/yhzhang0128

3 years ago

87 points

113.

SiFive open sources RISC-V chips

github.com/sifive

10 years ago

85 points

114.

Glacial – Microcoded RISC-V core designed for low FPGA resource utilization

github.com/brouhaha

5 years ago

peter_d_sherman

78 points

115.

ORCA – An implementation of RISC-V intended to target FPGAs

github.com/VectorBlox

10 years ago

77 points

116.

The Ice-V: a simple, compact RISC-V RV32I implementation in Silice

github.com/sylefeb

5 years ago

75 points

117.

Show HN: New RISC-V emulator for Computer Science education

github.com/gboncoffee

2 years ago

71 points

118.

Multiplix, operating system kernel for RISC-V and AArch64 SBCs

github.com/zyedidia

3 years ago

70 points

119.

Emuko: Fast RISC-V emulator written in Rust, boots Linux

github.com/wkoszek

4 months ago

70 points

120.

Mojo-V: Secret Computation for RISC-V

github.com/toddmaustin

7 months ago

66 points