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Top New Best Ask Show Jobs

Top New Best Ask Show Jobs

211.

Show HN: Scaffold out a node module with ES6+, Babel, tape and npm scripts

github.com/bucaran

10 years ago

2 points

212.

RISC-V CPU in Chisel

github.com/ucb-bar

13 years ago

1 points

213.

RisingWave is a cloud-native streaming database

github.com/singularity-data

4 years ago

tonyabracadabra

1 points

214.

A high performance memory-bound Go cache

github.com/dgraph-io

7 years ago

1 points

215.

Show HN: The C3 programming language (C alternative language)

github.com/c3lang

a year ago

175 points

216.

Ask HN: Examples of Microkernels?

4 years ago

80 points

217.

Show HN - third party risk wrt security or gdpr

7 years ago

2 points

218.

Vibe Code Warning – A personal casestudy

github.com/jackdoe

7 months ago

400 points

219.

Collection of awesome projects, blog posts, books, and talks on quantifying risk

github.com/veeral-patel

6 years ago

118 points

220.

github.com/mit-pdos

7 years ago

114 points

221.

RISC-V userspace emulator library

github.com/fwsGonzo

7 years ago

43 points

222.

Do your part to secure the open source supply chain

github.com/readme

3 years ago

5 points

223.

github.com/mit-pdos

4 years ago

5 points

224.

Show HN: Ristex – A Parser Combinator Library for RIR Statistics Exchange Files

github.com/ip-num-tools

7 years ago

5 points

225.

Show HN: Django ORM back end for RisingWave

github.com/bas-codes

3 years ago

3 points

226.

Do your part to secure the open source supply chain

github.com/readme

3 years ago

3 points

227.

RISC-V userspace emulator library

github.com/fwsGonzo

7 years ago

3 points

228.

How to make RISC-V Microcomputer using FPGA for programmer

github.com/horie-t

4 years ago

2 points

229.

Coronavirus: An at Risk Person Lives Here – Poster

github.com/kevinmtrowbridge

6 years ago

2 points

230.

Show HN: DriftProof – Specification for preventing LLM behavioral drift

github.com/sarduine13-star

4 months ago

1 points

231.

Show HN: TCP Socket in RISC-V Assembly (RV64I)

github.com/triilman25

a year ago

4 points

232.

AOSP (Android 10) port to RISC-V

github.com/T-head-Semi

5 years ago

4 points

233.

Android 10 ported to RISC-V

github.com/T-head-Semi

5 years ago

2 points

234.

Show HN: rust-based kernel with asynchronous context switching

github.com/xiaoyang-sde

3 years ago

1 points

235.

Charts that estimate risk events will have one Covid-19 positive individuals

github.com/jsweitz

6 years ago

1 points

236.

The Rise of Expression-Oriented Programming

joelmccracken.github.com

14 years ago

1 points

237.

Ask HN: Why can't I get an internship?

11 years ago

7 points

238.

DYMO Root CA Is a Security Risk (2018)

2 years ago

4 points

239.

Python RiscV Core

github.com/cjdrake

a year ago

2 points

240.

Educational OS Labs for RISC-V CPU

github.com/chyyuu

8 years ago

2 points