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Top New Best Ask Show Jobs

1.

Open-source soft-core RISC-V SoC with gdb support

github.com/stnolting

5 years ago

94 points

2.

A generic VHDL touch controller – add capacitive buttons to any FPGA

github.com/stnolting

5 years ago

77 points

3.

Adding custom RISC-V instructions to an open-source rv32 SoC

github.com/stnolting

4 years ago

54 points

4.

The NEO430 Processor

github.com/stnolting

5 years ago

42 points

5.

NEORV32: A tiny, embedded and free-of-charge open-source RISC-V SoC

github.com/stnolting

4 years ago

40 points

6.

Show HN: A tiny and platform-agnostic true random number generator for FPGA/ASIC

github.com/stnolting

3 years ago

27 points

7.

A Transparent Wishbone-to-SPI Bridge Supporting Execute-in-Place (XIP)

github.com/stnolting

5 years ago

17 points

8.

Show HN: A Tiny and Platform-Agnostic True Random Number Generator for Any FPGA

github.com/stnolting

5 years ago

5 points

9.

Show HN: Porting RISCOF to a new RISC-V target

github.com/stnolting

4 years ago

youre_the_voice

2 points

10.

Show HN: Convert VHDL to Verilog using GHDL (+ first evaluation)

github.com/stnolting

4 years ago

youre_the_voice

2 points

11.

Adding newlib system calls to a bare-metal RISC-V platform

github.com/stnolting

4 years ago

2 points

12.

Open-source RISC-V soft-core NEORV32 adds on-chip debugger support

github.com/stnolting

5 years ago

2 points

13.

Show HN: A Technolgy-Agnostic Physical Unclonable Function (PUF) for Any FPGA

github.com/stnolting

5 years ago

1 points

14.

The NEORV32 RISC-V soft-core microcontroller

github.com/stnolting

5 years ago

1 points

15.

Fire Code font version 4 released

github.com/tonsky

6 years ago

2 points