HK
Heykuki News
Top
New
Best
Ask
Show
Jobs
Toggle theme
Top
New
Best
Ask
Show
Jobs
Request
61.
▲
A Clone of “Space Invaders” in VHDL
github.com/fabioperez
1 comment
10 years ago
unwind
36 points
62.
▲
Space Invaders Implemented in VHDL Running on an FPGA
github.com/fabioperez
discuss
10 years ago
fabioperez
4 points
63.
▲
Show HN: Verilog HDL support for VS Code
github.com/mshr-h
discuss
8 years ago
Raamakrishnan
3 points
64.
▲
Minecraft HDL, an HDL for Redstone
github.com/itsfrank
33 comments
8 months ago
sleepingreset
225 points
65.
▲
Microwatt: A tiny Open POWER ISA softcore written in VHDL 2008
github.com/antonblanchard
36 comments
3 years ago
ksec
141 points
66.
▲
Show HN: A 16-bit Forth machine written in VHDL
github.com/inforichland
16 comments
12 years ago
inforichland
80 points
67.
▲
A generic VHDL touch controller – add capacitive buttons to any FPGA
github.com/stnolting
17 comments
5 years ago
_quarks_
77 points
68.
▲
Microwatt: A Tiny Open Power ISA Softcore Written in VHDL 2008
github.com/antonblanchard
3 comments
7 years ago
protomyth
73 points
69.
▲
Show HN: A pipelined RISC-V processor written in VHDL
github.com/inforichland
29 comments
11 years ago
inforichland
65 points
70.
▲
Forth SoC Written in VHDL
github.com/howerj
12 comments
5 years ago
petrohi
54 points
71.
▲
SystemLisp – an HDL simulator written in Common Lisp
github.com
discuss
3 months ago
tiberius_p
15 points
72.
▲
NVC: VHDL Compiler and Simulator
github.com/nickg
2 comments
a year ago
eulgro
8 points
73.
▲
Show HN: High performance VHDL based ADS-B decoder
github.com/Nuand
1 comment
10 years ago
nuand
5 points
74.
▲
Geode: A Classic 5-Stage Pipeline Written in Atlas/Python HDL
github.com/medav
discuss
8 years ago
ninjacatex
4 points
75.
▲
A SAT solver implementation in VHDL, welcome feedback
github.com/Sumith1896
discuss
10 years ago
sumith1896
4 points
76.
▲
Show HN: Click-Flasher, a simple FPGA design written in VHDL
github.com/brakmic
discuss
10 years ago
brakmic
4 points
77.
▲
PipelineC: A C-like HDL adding automatic pipelining
github.com/JulianKemmerer
discuss
6 years ago
ris
3 points
78.
▲
p-Vex: A Reconfigurable and Extensible [FPGA, 32-Bit] VLIW Soft Processor (VHDL)
github.com/tvanas
discuss
7 years ago
peter_d_sherman
3 points
79.
▲
Microwatt – A Tiny Open Power ISA Softcore Written in VHDL 2008
github.com/antonblanchard
discuss
7 years ago
ajdlinux
3 points
80.
▲
SpinalHDL: Write Scala, Get VHDL/Verilog
github.com/SpinalHDL
discuss
9 years ago
_lbaq
3 points
81.
▲
New PyXHDL Release (Python Frontend To VHDL And Verilog)
github.com/davidel
discuss
2 months ago
dadaz
2 points
82.
▲
PyXHDL – Python Front End for VHDL and Verilog
github.com/davidel
discuss
2 months ago
dadaz
2 points
83.
▲
Sparkle HDL
github.com/Verilean
discuss
3 months ago
smj-edison
2 points
84.
▲
C++ HDL (Hardware Description Language)
github.com/mirekez
discuss
7 months ago
olvy0
2 points
85.
▲
Show HN: An efficient SRL32 (cascading shift registers) clock prescaler in VHDL
gist.github.com
discuss
2 years ago
VioletVillain
2 points
86.
▲
Chisel: a scala based HDL using layered domain-specific hardware languages
github.com/ucb-bar
discuss
13 years ago
luu
1 points
87.
▲
Polymorphic Blocks – WIP HDL
github.com/BerkeleyHCI
discuss
3 years ago
kristianpaul
1 points
88.
▲
PCBFlow – Transform VHDL/Verilog to a Discrete Circuit on a PCB
github.com/cpldcpu
discuss
5 years ago
kken
1 points
89.
▲
My first steps into VHDL/FPGAs – real-time fractal zooming
github.com/ttsiodras
discuss
8 years ago
ttsiodras
1 points
90.
▲
Show HN: Game Bub – open-source FPGA retro emulation handheld
eli.lipsitz.net
62 comments
a year ago
elipsitz
274 points
More